Publications

 

Intelligent Compilers and Compile-Time Performance Prediction

CDPR99

Calin Cascaval, Luiz DeRose, David Padua, and Daniel Reed. Compile-time Based Performance Prediction. Proceedings of the 12th International Workshop on Languages and Compilers for Parallel Computing (LCPC), August 1999, La Jolla, CA. Also to appear in Lecture Notes in Computer Science, Springer-Verlag.

 

YLRC03

Kamen Yotov, Xiaoming Li, Gang Ren, Michael Cibulskis, Gerald DeJong, Maria Garzaran, David Padua, Keshav Pingali, Paul Stodghill, and Peng Wu. A Comparison of Empirical and Model-Driven Optimization. Proceedings of the ACM SIGPLAN 2003 conference on Programming language design and implementation. San Diego, CA, June 9-11, 2003.

 

CaPa03

Calin Cascaval and David Padua. Estimating Cache Misses and Locality Using Stack Distances. Proceedings of the 2003 ACM International Conference on Supercomputing. San Francisco, CA, June 21-26, 2003.

 

GuGP03

J. Guo, M. J. Garzaran, and D. Padua The Power of Belady's Algorithm in Register Allocation for Long Basic Blocks. Submitted. 2003.

 

Language Extensions for Parallel Programming and Processors-in-Memory

FRFP02  

B. B. Fraguela, J. Renau, P. Feautrier, D. Padua, and J. Torrellas. Programming the FlexRAM Intelligent Memory Architecture. Proc. of 15th International Workshop on Languages and Compilers for Parallel Computing (LCPC'02). To appear in Lecture Notes in Computer Science. Springer-Verlag 2003.

 

FRFP03  

B. B. Fraguela, J. Renau, P. Feautrier, D. Padua, and J. Torrellas. Programming the FlexRam Parallel Intelligent Memory System. Proc. of the Ninth ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming. June 11-13, San Diego, CA USA. pp. 49-60. 2003.

 

ADMP03  

G. Almasi, L. De Rose, J. Moreira, D. Padua Programming for Locality and Parallelism with Hierarchically Tiled Arrays Submitted

 

Compilers and Debuggers for Parallel Programs

Parallel Program Debuggers

EmPa88

P. Emrath and D. Padua. Automatic detection of non-determinacy in parallel programs. Proc. of the ACM SIGPLAN and SIGOPS Workshop on Parallel and Distributed Debugging, Madison, WI USA, May 5-6. pp. 89-99. 1988.

 

EmGP89

P. Emrath, S. Ghosh, and D. Padua. Event synchronization analysis for debugging parallel programs. Proc. of the 1989 conference on Supercomputing. Reno, NV USA, November 12-17. pp. 580-588. 1989.

 

EmGP92

P. Emrath, S. Ghosh and D. Padua. Detecting nondeterminacy in parallel programs. IEEE Software. January 1992.

 

Parallel Program Compilers

MiPC89

S. P. Midkiff, D. A. Padua and R. G. Cytron. Compiling programs with user parallelism. Languages and Compilers for Parallel Computing. D. Gelernter, A. Nicolau, and D. Padua (Eds.). pp. 402-422. MIT Press, 1989.

 

MiPa90

S. Midkiff and D. Padua. Issues in the compile- time optimization of parallel programs. Proc. of Int'l Conf. on Parallel Processing 1990, Vol. II, pp. 105-113, August 1990.

 

LeMP98

J. Lee, S. Midkiff, and D. Padua. A constant propagation algorithm for explicitly parallel programs. International Journal of Parallel Programming. Vol. 26, No. 5, pp.563-589 October 1998.

 

LeMP97

J. Lee, S. Midkiff, and D. Padua. Concurrent static single sssignment form and constant propagation for explicitly parallel programs. Languages and Compilers for Parallel Computing. Lecture Notes in Computer Science. S. Chaterjee, Z. Li, D. Sehr, and P. Yew (Eds.), Springer-Verlag, 1998.

 

LePM99

J. Lee, D. Padua, and S. Midkiff. Basic compiler algorithms for parallel programs. Proc. of the Seventh ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming. May 16-19, Atlanta, GA USA. pp. 1-12. 1999.

 

ZhHP01  

J. Zhu, J. Hoeflinger, and D. Padua. A Synthesis of Memory Mechanisms for Distributed Architectures. Proceedings of the 15th International Conference on Supercomputing, pp. 13-22, Sorrento, Italy. June 17-21, 2001.

 

ZhHP02  

J. Zhu, J. Hoeflinger, and D. Padua. Compiling for a Hybrid Programming Model Using the LMAD Representation. Proc. of 14th International Workshop on Languages and Compilers for Parallel Computing (LCPC'01). To appear in Lecture Notes in Computer Science. Springer-Verlag 2002.

 

EHKP02  

R. Eigenmann, J. Hoeflinger, R. Kuhn, D. Padua, A. Basumallic, S.-J. Min, J. Zhu. Is OpenMp for Grids ? NSF Next Generation Systems Program Workshop held in conjunction with IPDPS. April 2002.

 

Compilers for Memory Model

LePa00  

J. Lee and D. Padua. Hiding Relaxed Memory Consistency with Compilers. International Conference on Parallel Architectures and Compilation Techniques (PACT'00), pp. 111-122, Philadelphia, Pennsylvania, October 15 - 19, 2000.

 

LePa01  

J. Lee and D. Padua. Hiding Relaxed Memory Consistency with a Compiler. IEEE Transactions on Computers. Vol. 50, No. 8, pp. 824-833, August 2001.

 

SWFL03  

Z. Sura, C.-L. Wong, X. Fang, J. Lee, S. Midkiff, and D. Padua. Automatic Implementation of Programming Language Consistency Models. Proc. of 15th International Workshop on Languages and Compilers for Parallel Computing (LCPC'02). To appear in Lecture Notes in Computer Science. Springer-Verlag 2003.

 

WSFL02  

C. Wong, Z. Sura, X. Fang, J. Lee, S. Midkiff, D. Padua. A Compiler Infrastructure for Memory Models. Proceedings of the Sixth International Symposium on Parallel Architectures, Algorithms, and Networks. May 22-24, 2002; Ateneo @ Rockwell Center, Metro Manila, Philippines.

 

MATLAB Compilers

DGGM95

L. DeRose, K. Gallivan, E. Gallopoulos. B. Marsolf, and D. Padua. FALCON: A MATLAB interactive restructuring compiler. Languages and Compilers for Parallel Computing. Lecture Notes in Computer Science 1033. C.H. Huang, P. Sadayappan, U. Banerjee, D. Gelernter, A. Nicolau, and D. Padua (Eds.). pp. 269-287. Springer-Verlag, 1995.

 

DePa96

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L. DeRose and D. Padua. Inference mechanisms for MATLAB programs. Proceedings of the 10th ACM International Conference on Supercomputing. pp. 309-316. May 24-28, Philadelphia, 1996.

 

DeRo96

L. DeRose. Compiler techniques for MATLAB programs. Ph.D. Thesis, Department of Computer Science, University of Illinois at Urbana-Champaign, May 1996.

 

DePa97

L. DeRose and D. Padua. Benchmarking FALCON's MATLAB-to-Fortran 90 compiler on a SGI Power Challenge. IX Simposio Brasileiro de Arquitetura de computadores: Processamento de Alto Desempenho. Campos do Jordao, SP, Brazil. October 1997. pp. 285-299.

 

AlCP99

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George Almasi, Calin Cascaval, and David Padua. MATmarks: A Shared Memory Environment for MATLAB Programming. Proceedings of the 8th IEEE International Symposium on High Performance Performance Distributed Computing (HPDC), August 1999, Redondo Beach, CA, pp. 341-342.

 

DePa99

L. DeRose and D. Padua. Techniques for the translation of MATLAB programs into Fortran 90. ACM Transactions on Programming Languages and Systems. Vol 21, No. 2, pp. 286-323, March 1999.

 

AlCP00

George Almasi, Calin Cascaval, and David Padua. MATmarks: Distributed Shared Matlab. Proceedings of the 2nd International Workshop on Software Distributed Shared Memory, May 2000, Santa Fe, NM.

 

DMGG00

L.DeRose, B. Marsolf, K. Gallivan, E. Gallopoulos, and D. Padua. Design Issues in MATLAB-Based Environment for Numerical Program Development. In Enabling Technologies for Computational Science. Frameworks, Middleware and Environments. In. Houstis, J. Rice, E. Gallopoulos, and R. Bramley (Eds). Kluwer. Boston MA. 2000.

 

AlPa00

G. Almasi and D. Padua. MaJIC: a Matlab Just-In-time Compiler. In Proc. of Thirteenth International Workshop on Languages and Compilers for Parallel Computing (LCPC'00), Aug. 2000. Lecture Notes in Computer Scienc, Springer-Verlag.

 

AlPa02

G. Almasi and D. Padua. MaJIC: Compiling MATLAB for speed and responsiveness. Proceedings of the ACM SIGPLAN'02 Conference on Programming Language Design and Implementation (PLDI 2002), pp. 294-303, Berlin, Germany, June 17-19, 2002.

 

Signal Procesing Compilers

XiJP01

J. Xiong, J. Johnson, and D Padua. SPL: A Language and Compiler for DSP Algorithms. Proceedings of the 2001 ACM Conference on Programming Language Design and Implementation (PLDI 2001), pp. 298-308, Snowbird, Utah June 20 - 22, 2001.

 

JJPX00

J. Johnson, R. W. Johnson, D. Padua, and J. Xiong. Searching for the Best FFT Formulas with the TPL Compiler. In Proc. of Thirteenth International Workshop on Languages and Compilers for Parallel Computing (LCPC'00), Aug. 2000. Lecture Notes in Computer Science. Springer-Verlag.

 

Java Compilers

WuPa98

Peng Wu and David Padua. Beyond Arrays: A Container-centric Approach for Parallelization of Real-world Symbolic Applications. Proceedings of the 11th International Workshop on Languages and Compilers for Parallel Computing (LCPC). Lecture Notes in Computer Science, Springer-Verlag, 1998.

 

WMMG99

Peng Wu, Sam Midkiff, Jose Moreira, and M. Gupta. Efficient Support for Complex Numbers in Java. Proceedings of the ACM'99 Java Grande Conference, San Francisco, CA, June 1999.

 

WuPa99

Peng Wu and David Padua. Containers on the Parallelization of General-purpose Java Programs. Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, October, 1999. Also available as University of Illinois at Urbana-Champaign, CSRD Technical Report No. 1571, 1999.

 

WuPa99

P. Wu and D. Padua. Containers and the parallelization of general-purpose Java programs. Proc. of the 1999 International Conference on Parallel Architectures and Compilation Techniques. October 1999..

 

WuPa00

P. Wu and D. Padua. Containers on the Parallelization of General-Purpose Java Programs International Journal of Parallel Programming 28(6): 589-605; Dec 2000.

 

WuFP02

P. Wu, P. Feautrier, D. Padua, and Z. Sura. Instance-wise points-to analysis for loop-based dependence testing.Proceedings of the 2002 International Conference on Supercomputing, pp. 262-273, June 22-26, 2002, New York City.

 

Parallelism Detection

General

PaWo86

D. Padua and M. Wolfe. Advanced compiler optimizations for supercomputers. Communications of the ACM. Vol. 29, No. 12, pp. 1184-1201, December 1986.

 

BENP93

U. Banerjee, R. Eigenmann, A. Nicolau, and D. Padua. Automatic program parallelization. Proceedings of IEEE. Vol. 81, No. 2, February 1993.

 

Padu93

D. Padua. Parallelizing compilers. 1993 Yearbook of Science and Technology. McGraw-Hill, 1993.

 

Hand Parallelization of Fortran Program

EHJL93

R. Eigenmann, J. Hoeflinger, G. Jaxon, Z. Li, and D. Padua. Restructuring Fortran programs for Cedar. Concurrency: Practice and Experience. Vol. 5(7), pp. 553-573. October 1993.

 

SkEi94

Gregg M. Skinner and Rudolf Eigenmann. Parallelization and Performance of a Combustion Chemistry Simulation. Scientific Programming, Special Issue: Applications Analysis, 1995, 4(3), 1994.

 

BlEi94

William Blume and Rudolf Eigenmann. An Overview of Symbolic Analysis Techniques Needed for the Effective Parallelization of the Perfect Benchmarks. Proceedings of the 1994 International Conference on Parallel Processing, pages II233 -- II238, August, 1994.

 

EiHP94

Rudolf Eigenmann, Jay Hoeflinger, and David Padua. On the Automatic Parallelization of the Perfect Benchmarks . Technical Report 1392, Univ. of Illinois at Urbana-Champaign, Center for Supercomputing Res. & Dev., December 1994.

 

PoEi95

Bill Pottenger and Rudolf Eigenmann. Targeting a Shared Address Space Version of the Seismic Benchmark Seis 1.1. Technical Report 1456, Univ. of Illinois at Urbana-Champaign, Center for Supercomputing Res. & Dev., December 1995.

 

Pott96

Bill Pottenger. Parallelism in Loops Containing Recurrences. Technical Report 1497, Univ. of Illinois at Urbana-Champaign, Center for Supercomputing Res. & Dev., June 1996.

 

AGLP96

Rafael Asenjo, Eladio Gutierrez, Yuan Lin, David Padua, Bill Pottenger, and Emilio Zapata. On the Automatic Parallelization of Sparse and Irregular Fortran Codes. Technical Report 1512, Univ. of Illinois at Urbana-Champaign, Center for Supercomputing Res. & Dev., December 1996.

 

EiHP98

R. Eigenmann, J. Hoeflinger, and D. Padua. On the automatic parallelization of the Perfect Benchmarks. IEEE Transactions on Parallel and Distributed Systems. Vol. 9, No. 1, pp. 5-23. Jan. 1998.

 

Pott98

Bill Pottenger. The Role of Associativity and Commutativity in the Detection and Transformation of Loop-Level Parallelism. Proc. of the 12th ACM International Conference on Supercomputing, Melbourne, Australia, July 1998. (CSRD Report No. 1531).

 

LiPa99

Yuan Lin and David Padua. Code Study: Automatic Parallelism Detection in Dyfesm. Proceedings of the First Workshop on Parallel Computing for Irregular Applications, Orlando, FL, January 1999.

 

HAJK00

Jay Hoeflinger, Prasad Alavilli, Thomas Jackson, and Bob Kuhn. Producing Scalable Performance with OpenMP: Experiments with Two CFD Applications. Technical Report 1573, Univ. of Illinois at Urbana-Champaign, May 2000.

 

ReWP03

G. Ren, P. Wu, and D. Padua A Preliminary Study On the Vectorization of Multimedia Applications for Multimedia Extensions. Submitted. 2003.

 

The Polaris Fortran Restructurer

PEHP93

D. Padua, R. Eigenmann, J. Hoeflinger, P. Petersen, P. Tu, S. Weatherford, and K. Faigin. Polaris: A New-Generation Parallelizing Compiler for MPP's. Technical Report 1306, Univ. of Illinois at Urbana-Champaign, Center for Supercomputing Res. & Dev., June 1993.

 

BEFG94a

William Blume, Rudolf Eigenmann, Keith Faigin, John Grout, Jay Hoeflinger, David Padua, Paul Petersen, Bill Pottenger, Lawrence Rauchwerger, Peng Tu, and Stephen Weatherford. Polaris: The Next Generation in Parallelizing Compilers. Proceedings of the Seventh Workshop on Languages and Compilers for Parallel Computing, Ithaca, New York, pages 10.1 -- 10.18, August 1994.

 

BEFG94

W. Blume, R. Eigenmann, K. Faigin, J. Grout, J. Hoeflinger, D. Padua, P. Petersen, W. Pottenger, L. Rauchwerger, P. Tu, and S. Weatherford. Polaris: Improving the effectiveness of parallelizing compilers. Languages and Compilers for Parallel Computing. Lecture Notes in Computer Science 892. K. Pingali, U. Banerjee, D. Gelernter, A. Nicolau, and D. Padua (Eds.). pp. 141-154. Springer-Verlag, 1994.

 

BHEP94

W.Blume, R. Eigenmann, J. Hoeflinger, D. Padua, P. Petersen, L. Rauchwerger, and P. Tu. Automatic detection of parallelism: A grand challenge for high-performance computing. CSRD Report No. 1348. A version of this report appeared in IEEE Parallel and Distributed Processing Technology. Vol. 2, No. 3. pp. 37-47. Fall 1994.

 

FWHP94

K. Faigin, S. Weatherford, J. Hoeflinger, D. Padua, and P. Petersen. The Polaris internal representation. International Journal of Parallel Programming. Vol. 22, No. 5, pp. 553-586m October 1994.

 

Weat94

Stephen Weatherford. High-Level Pattern-Matching Extensions to C++ for Fortran Program Manipulation in Polaris. Master's thesis, Univ. of Illinois at Urbana-Champaign, Center for Supercomputing Res. & Dev., May 1994.

 

Faig94

Keith Aaron Faigin. The Polaris Internal Representation. Master's thesis, Univ. of Illinois at Urbana-Champaign, Center for Supercomputing Res. & Dev., 1994.

 

PaEH95a

David A. Padua, Rudolf Eigenmann, and Jay P. Hoeflinger. Automatic Program Restructuring for Parallel Computing and the Polaris Fortran Translator. Proceedings of the Seventh SIAM Conference on Parallel Processing for Scientific Computing, San Francisco, CA, February 15-17, 1995, pages 647--649, February 1995

 

Grou95

John Robert Grout. Inline Expansion for the Polaris Research Compiler. Master's thesis, Univ. of Illinois at Urbana-Champaign, Center for Supercomputing Res. & Dev., May 1995.

 

BDEG96

William Blume, Ramon Doallo, Rudolf Eigenmann, John Grout, Jay Hoeflinger, Thomas Lawrence, Jaejin Lee, David Padua, Yunheung Paek, Bill Pottenger, Lawrence Rauchwerger, and Peng Tu. Advanced Program Restructuring for High-Performance Computers with Polaris. Technical Report 1473, Univ. of Illinois at Urbana-Champaign, Center for Supercomputing Res. & Dev., January, 1996.

 

Padu96a

David Padua. Polaris: An Optimizing Compiler for Parallel Workstations and Scalable Multiprocessors. Technical Report 1475, Univ. of Illinois at Urbana-Champaign, Center for Supercomputing Res. & Dev., January 1996.

 

PaPe96

Yunheung Paek and Paul Petersen. A Data Dependence Graph in Polaris. Technical Report 1495, Univ. of Illinois at Urbana-Champaign, Center for Supercomputing Res. & Dev., May 1996.

 

BEFG96

W. Blume, R. Eigenmann, K. Faigin, J. Grout, J. Lee, T. Lawrence, J. Hoeflinger, D. Padua. Y. Paek, P. Petersen, W. Pottenger, L. Rauchwerger, P. Tu, S. Weatherford. Restructuring programs for high-speed computers with Polaris. Proceedings of the 1996 ICPP Workshop on Challenges for Parallel Processing. August 12, 1996. pp. 149-161. August 1996.

 

BDEG96

W. Blume, R. Doallo, R. Eigenmann, J. Grout, J. Hoeflinger, T. Lawrence, J. Lee, D. Padua, Y. Paek, W. Pottenger, L. Rauchwerger, and P. Tu. Parallel programming with Polaris. IEEE Computer. Vol. 29, No. 12, pp 78-82, Dec. 1996.

 

Dependence Analysis

The Range Test

BlEi94b

William Blume and Rudolf Eigenmann. The Range Test: A Dependence Test for Symbolic, Non-linear Expressions. Proceedings of Supercomputing '94, Washington D.C., pages 528--537, November 1994.

 

BlEi94c

William Blume and Rudolf Eigenmann. Symbolic Range Propagation. Proceedings of the 9th International Parallel Processing Symposium, April 1995.

 

Blum95

William Joseph Blume. Symbolic analysis techniques for effective automatic paralellization. Ph.D. Thesis, Department of Computer Science, University of Illinois at Urbana-Champaign, June 1995.

 

BlEi95

William Blume and Rudolf Eigenmann. Demand-driven, Symbolic Range Propagation. Proceedings of the Eighth Workshop on Languages and Compilers for Parallel Computing, Columbus, OH, pages 141--160, August 1995.

 

BlEi96

William Blume and Rudolf Eigenmann. Non-Linear and Symbolic Data Dependence Testing. Technical Report 1490, Univ. of Illinois at Urbana-Champaign, Center for Supercomputing Res. & Dev., May 1996.

 

Access Region Analysis

BlEi96

Jay Hoeflinger. Automatically Parallelizing the Main Loops in TFFT2 Via Access Region Analysis. Technical Report 1524, Univ. of Illinois at Urbana-Champaign, Center for Supercomputing Res. & Dev., May 1996.

 

PaHP96

Yunheung Paek, Jay Hoeflinger, and David Padua. Access Regions: Toward a Powerful Parallelizing Compiler. Technical Report 1508, Univ. of Illinois at Urbana-Champaign, Center for Supercomputing Res. & Dev., November 1996.

 

HPaP96

Jay Hoeflinger, Yunheung Paek, and David Padua. Region-based Parallelization Using the Region Test. Technical Report 1514, Univ. of Illinois at Urbana-Champaign, Center for Supercomputing Res. & Dev., December 1996.

 

PaHP97

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Yunheung Paek, Jay Hoeflinger, and David Padua. Simplification of Array Access Patterns for Compiler Optimizations. Proceedings of the 1998 ACM Conference on Programming Language Design and Implementation, Montreal, Canada, June 1998.

 

Hoef98

Jay Hoeflinger. Interprocedural Parallelization Using Memory Classification Analysis. Technical Report 1543, Univ. of Illinois at Urbana-Champaign, Center for Supercomputing Res. &: Dev., August 1998. Ph.D. thesis.

 

PaHP02

Y. Paek, J. Hoeflinger, and D. Padua. Efficient and Precise Array Access Analysis. ACM Transactions on Programming Languages and Systems (TOPLAS). Vol. 24, Issue 1, pp. 65-109, January 2002.

 

Evaluation of Dependence Analysis Techniques

PaPe92

D. Padua and P. Petersen. Evaluation of Parallelizing Compilers. Parallel Computing and Transputer Applications. M. Valero, E. Onate, M. Jane, J.L. Larriba, and B. Suarez (Eds). pp. 1505-1514. IOS Press/ CIMNE, Barcelona, 1992.

 

PePa93

P. Petersen and D. Padua. Dynamic Dependence Analysis: A Novel Method for Data Dependence Evaluation. Languages and Compilers for Parallel Computing. Lecture Notes in Computer Science 757, U. Banerjee, D. Gelernter, A. Nicolau, and D. Padua (Eds.). pp. 64-81. Springer-Verlag, 1993.

 

PePa93

P. Petersen and D. Padua. Static and Dynamic Evaluation of Data Dependence Analysis. Proceedings of the 7th ACM International Conference on Supercomputing. Tokyo, Japan, July 19-23, pp. 107-116. 1993.

 

Pete93

P. Petersen. Evaluation of Programs and Parallelizing Compilers Using Dynamic Analysis Techniques. Ph.D. Thesis, Department of Computer Science, University of Illinois at Urbana-Champaign, 1993.

 

PePa96

P. Petersen and D. Padua. Static and Dynamic Evaluation of Data Dependence Analysis Techniques. IEEE Transactions on Parallel and Distributed Systems. Vol. 7, No. 11, pp. 1121-1132. Nov, 1996. (CSRD Report No. 1509)

 

Analysis of Irregular Computations

LiPa98

Y. Lin and D. Padua. On the Automatic Parallelization of Sparse and Irregular Fortran Programs. In Proc. of 4th Workshop on Languages, Compilers, and Run-TimeSystems for Scalable Computers (LCR’98),Lecture Notes in Computer Science, No. 1511, pp. 41-56. Springer-Verlag, Pittsburgh, PA, 1998.

 

LiPa99a

Yuan Lin and David Padua. Analysis of Irregular Single-indexed Arrays and Its Applications in Compiler Optimizations. Technical Report 1566, Univ. of Illinois at Urbana-Champaign, October 1999.

 

LiPa99c

Y. Lin and D. Padua. A Simple Framework to Calculate the Reaching Definition of Array References and Its Use in Subscript Array Analysis. In Parallel and Distributed Processing, Proc. of 11 IPPS/SPDP'99 Workshops Held in Conjunction with the 13th International Parallel Processing Symposium and 10th Symposium on Parallel and Distributed Processing, volume 1586 of Lecture Notes in Computer Science, pages1036-1045. Springer-Verlag, 1999.

 

LiPa99d

Y. Lin and D. Padua. Demand-driven Interprocedural Array Property Analysis. Languages and Compilers for Parallel Computing (LCPC'99), Lecture Notes in Computer Science, No. 1863, S. Chatterjee, Z. Li, D. Sehr, and P. Yew (eds.), Springer-Verlag.

 

Lin00

Yuan Lin. Compiler Analysis of Sparse and Irregular Computations. Technical Report 1572, Univ. of Illinois at Urbana-Champaign, March 2000. Ph.D. thesis.

 

LiPa00a

Y. Lin and D. Padua. Analysis of Irregular Single-indexed Arrays and Its Applications in Compiler Optimizations. Proceedings of the 9th International Conference on Compiler Construction. Berlin, Germany, March 2000.

 

LiPa00b

Y. Lin and D. Padua. Compiler Analysis of Irregular Memory Accesses. Proceedings of the 2000 ACM Conference on Programming Language Design and Implementation (PLDI 2000), pp. 157-168, Vancouver, Canada, June 2000.

 

Array Privatization

TuPa92

P. Tu and D. Padua. Array Privatization for Shared and Distributed Memory Machines. Proceedings of the 2nd Workshop on Languages, Compilers, and Run-Time Environments for Distributed Memory Machines. Boulder, CO, Sept. 30 - Oct. 2, 1992. SIGPLAN NOTICES, January 1993.

 

Tu1993

Peng Tu. Privatization and Distribution of Arrays. Technical Report 1410, Univ. of Illinois at Urbana-Champaign, Center for Supercomputing Res. & Dev., March 1993.

 

TuPa93

Peng Tu and D. Padua. Automatic Array Privatization. Languages and Compilers for Parallel Computing. Lecture Notes in Computer Science 768, U. Banerjee, D. Gelernter, A. Nicolau, and D. Padua (Eds.), pp. 500-521, Springer-Verlag, 1994.

 

TuPa94

Peng Tu and David Padua. Demand-Driven Symbolic Analysis. Technical Report 1336, Univ. of Illinois at Urbana-Champaign, Center for Supercomputing Res. & Dev., Febraury 1994.

 

TuPa95a

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P. Tu and D. Padua. Efficient Building and Placing of Gating Functions. ACM SIGPLAN'95. Conference on Programming Languages Design and Implementation (PLDI). pp. 47-55. La Jolla, CA, June 18-21, 1995.

 

TuPa95b

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P. Tu and D. Padua. Gated-SSA Based Demand-Driven Symbolic Analysis for Parallelizing Compilers. Proceedings of the 9th ACM International Conference on Supercomputing. pp. 414-423. Barcelona, Spain, July 3-7, 1995.

 

Tu95

P. Tu. Automatic Array Privatization and Demand Drivan Symbolic Analysis. Ph.D. Thesis, Department of Computer Science, University of Illinois at Urbana-Champaign, May 1995.

 

TuPa01

P. Tu and D. Padua. Automatic Array Privatization. In Compiler Optimizations for Scalable Parallel Systems. Santosh Pande and Dharma P. Agrawal (Eds.). Lecture Notes in Computer Science 1808. Springer Verlag 2001. pp.247-281.

 

Run-Time Analysis

RaPa94a

Lawrence Rauchwerger and David Padua. Speculative Run-Time Parallelization of Loops. Technical Report 1339, Univ. of Illinois at Urbana-Champaign, Center for Supercomputing Res. & Dev., March 1994.

 

RaPa94b

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L. Rauchwerger and D. Padua. The privatizing DOALL test: a run-time technique for DOALL loop identification and array privatization. Proceedings of the 8th ACM International Conference on Supercomputing. pp. 33-43. Manchester, England, July 11-15, 1994.

 

RaPa94c

Lawrence Rauchwerger and David Padua. The Privatizing DOALL Test: A Run-Time Technique for DOALL Loop Identification and Array Privatization. Technical Report 1383, Univ. of Illinois at Urbana-Champaign, Center for Supercomputing Res. & Dev., October 1994.

 

RaPa94d

L. Rauchwerger and D. Padua. Run-time methods for parallelizing DO loops. Massive Parallelism, Hardware, Software and Applications. M. M. Furnari (Ed.) World Scientific. 1994.

 

RaPa95a

Lawrence Rauchwerger and David Padua. Parallelizing WHILE Loops for Multiprocessor Systems. Technical Report 1409, Univ. of Illinois at Urbana-Champaign, Center for Supercomputing Res. & Dev., March 1995.

 

RaPa95b

L. Rauchwerger and D. Padua. Parallelizing WHILE loops for multiprocessor systems. Proceedings of the 1995 International Parallel Processing Symposium. pp. 347-356. April 1995.

 

RaPa95c

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L. Rauchwerger and D. Padua. The LRPD test: Run- time parallelization of loops with privatization and reduction parallelization. ACM SIGPLAN'95. Conference on Programming Languages Design and Implementation (PLDI). pp. 218-232. La Jolla, CA USA,June 18-21, 1995.

 

RaAP95a

Lawrence Rauchwerger, Nancy M. Amato, and David A. Padua. A Scalable Method for Run-Time Loop Parallelization. Technical Report 1444, Univ. of Illinois at Urbana-Champaign, Center for Supercomputing Res. & Dev., June 1995.

 

RaAP95b

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L. Rauchwerger, N. Amato and D. Padua. Run-time methods for parallelizing partially parallel loops. Proceedings of the 9th ACM International Conference on Supercomputing. pp. 137-146. Barcelona, Spain, July 3-7, 1995.

 

Rauc95

L. Rauchwerger. Run-time parallelization: A framework for parallel computation. Ph.D. Thesis, Department of Computer Science, University of Illinois at Urbana-Champaign, August 1995.

 

RaPa99

L. Rauchwerger and D. Padua. The LRPD test: Run- time parallelization of loops with privatization and reduction parallelization. IEEE Transactions on Parallel and Distributed Systems. Vol. 10, No. 2, February 1999.

 

Induction variables, reductions, and recurrences

PoEi95

Bill Pottenger and Rudolf Eigenmann. Idiom Recognition in the Polaris Parallelizing Compiler. Proc. of the International Conference on Supercomputing, Barcelona, Spain, pages 444-448, July 1995.

 

Pott94

William Morton Pottenger. Induction Variable Substitution and Reduction Recognition in the Polaris Parallelizing Compiler. Master's thesis, Univ of Illinois at Urbana-Champaign, Cntr for Supercomputing Res & Dev, December 1994.

 

PoEi95

Bill Pottenger and Rudolf Eigenmann. Parallelization in the Presence of Generalized Induction and Reduction Variables. Technical Report 1396, Univ. of Illinois at Urbana-Champaign, Center for Supercomputing Res. & Dev., January 1995.

 

Pott97

Bill Pottenger. Theory, Techniques, and Experiments in Solving Recurrences in Computer Programs. PhD Thesis, Univ. of Illinois at Urbana-Champaign, Center for Supercomputing Res. & Dev., May 1997.

 

WuCP01

P. Wu, A. Cohen, and D. Padua. Induction Variable Analysis Without Idiom Recognition. Proc. of 14th International Workshop on Languages and Compilers for Parallel Computing (LCPC'01). To appear in Lecture Notes in Computer Science. Springer-Verlag 2002.

 

WCHP01

P. Wu, A. Cohen, J. Hoeflinger, and D. Padua. Monotonic Evolution: An Alternative to Induction Variable Substitution for Dependence Analysis. Proceedings of the 15th International Conference on Supercomputing, pp. 78-9, June 17-21, Sorrento, Italy, 2001.

 

NUMA Compilers

PaPa96

David Padua and Yunheung Paek. Automatic Parallelization for NonCoherent Cache Multiprocessors. Proceedings of the Workshop on Languages and Compilers for Parallel Computing, San Jose, CA; also to appear in Lecture Notes in Computer Science, August 1996.

 

PaPa96b

Yunheung Paek and David Padua. Compiling for Scalable Multiprocessors with Polaris. The Proceedings of the 1996 SPDP Workshop on the Challenges in Compiling for Scalable Parallel Systems, New Orleans; also to appear in Parallel Processing Letters, World Scientific Publishing, UK, 1997, August 1996.

 

PaPa97

Y. Paek and D. Padua. Automatic parallelization for noncoherent cache multiprocessors. Languages and Compilers for Parallel Computing. Lecture Notes in Computer Science 1239. D. Sehr, U. Banerjee, D. Gelernter, A. Nicolau, and D. Padua (Eds.), Springer-Verlag, 1997.

 

PaPa97

Y. Paek and D. Padua. Compiling for scalable multiprocessors with Polaris. Parallel Processing Letters. Vol. 7. No. 4. 1997.

 

NPZP97

A. Navarro, D. Padua, Y. Paek, and E. Zapata. Performance analysis for Polaris on distyributed memory multiprocessors. 3rd Workshop on Automatic Data Layout and Performance Prediction. Barcelona, January 1997.

 

NPZP97

A. Navarro, Y. Paek, E. Zapata, and D. Padua. Compiler techniques for effective communication on distributed memory multiprocessors. International Conference on Parallel Processing. 1997.

 

Paek97

Y. Paek. Compiling for distributed memory multiprocessors based on access region analysis. Ph.D. Thesis, Department of Computer Science, University of Illinois at Urbana-Champaign, May 1997.

 

PaPa98

Y. Paek and D. Padua. Experimental study of compiler techniques for scalable shared-memory machines. 12th International Parallel Processing Symposium. March 1998.

 

PNZP98

Y. Paek, A. Navarro, E. Zapata, and D. Padua. Parallelization of benchmarks for scalable shared-memory multiprocessors. International Conference on Parallel Architectures and Compilation Techniques Paris, France, 12 - 18 October, 1998.

 

NAZP99

A. Navarro, R. Asenjo, E. Zapata, and D. Padua. Access Descriptor based locality analysis for distributed-shared memory multiprocessors. Proceedings of the 1999 International Conference on Parallel Processing.

 

PNZH02

Y. Paek, A. Navarro, A. Zapata, J. Hoeflinger, and D. Padua. An Advanced Compiler Framework for Non-Cache-Coherent Multiprocessors. IEEE Transactions on Parallel and Distributed Systems, Vol. 13, No. 3, pp. 241-259, March 2002.

 

Machine Organization and the Cedar Multiprocessor

EJJP91

R. Eigenmann, J. Hoeflinger, G. Jaxon and D. Padua. Cedar Fortran and its Restructuring Compiler. Advances in Languages and Compilers for Parallel Computing. D. Gelernter, T. Gross, A. Nicolau and D. Padua, (Eds.). pp. 1-23. MIT Press, 1991.

 

Padu92

D. Padua. Supercomputers. Encyclopedia of Computer Science and Engineering. A. Ralston and E.D. Reilly (Eds). Van Nostrand Reynold, 1993.

 

KDLP93

D. Kuck, E. Davidson, D. Lawrie, D. Padua, et.al. The Cedar System and an Initial Performance Study. Proceedings of the Int'l. Symposium on Computer Architecture. San Diego, CA, May 17-19, 1993.

 

ToKP94

J. Torrellas, D. Koufaty, and D. Padua. Comparing the Performance of DASH and CEDAR Multiprocessors for Scientific Applications. Proceedings of the 1994 International Conference on Parallel Processing. Vol II. pp. 204-208. August 1994.

 

PaHo00

D. Padua and J. Hoeflinger. Supercomputers. Encyclopedia of Computer Science (Fourth Edition) A. Ralston, R. Reilly, and D. Hemmerdinger (eds.) Nature Publishing Group. London 2000.

 

Miscellaneous

Padu92

D. Padua. Problem-solving environments for parallel computers. Future Generation Computer Systems. Vol. 7, pp. 12-29, North Holland Elsevier Science Publishers,1991/92.

 

Padu96

D. Padua. Outline of a roadmap for compiler technology. Computational Science and Engineering. Vol. 3, No. 3, pp. 65-66, Fall 1996.

 

Padu00

D. Padua. The Fortran I compiler. Computing in Science and Engineering. Vol. 2, No. 1, January/February 2000.

 

 

 

 

 

 

 

 

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